发明名称 DEVELOPING SYSTEM FOR LINE DRAWING PATTERN OF BIT MAP MEMORY
摘要 PURPOSE:To generate a line drawing at a high speed as a whole by providing plural pieces of DDAs (digital differential analyzers), generating in parallel dot data of plural pieces of line drawing patterns, distributing them to each memory block, and executing write independently from others. CONSTITUTION:In each DDA 2, 2', a given segment data is developed to a dot pattern of the respective segments, and a position coordinate on a screen of all dots for constituting this dot pattern is calculated. Subsequently, this position coordinate is converted to a unit number and an address of the corresponding memory unit 9, and sent out as a dot data to a distributor 3. The distributor 3 distributes the received dot data to every memory block concerned 5 from the unit number, and sends it to a register 4 which has been provided on each memory block 5. This register 4 is a pushup storage, and the received dot data is written in an address of the designated memory unit.
申请公布号 JPS62271082(A) 申请公布日期 1987.11.25
申请号 JP19860115541 申请日期 1986.05.19
申请人 FUJITSU LTD 发明人 SANO KYOZO;KINUGASA TOSHIMITSU
分类号 G06T11/20 主分类号 G06T11/20
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