发明名称 ABSOLUTE VALUE DISCRIMINATING CIRCUIT
摘要 PURPOSE:To double the comparison speed by using an exclusive OR between the MSB of a data in the representation of two's complement. CONSTITUTION:In case of the exclusive OR output EX between the MSB and the 2SB of a data X in the representation of two' complement at a level '1', with the data X in a range of -1<=<1, the size of the data X is expressed in -1<=X<0.5 or 0.5<=X<1, and with the exclusive OR EX at logical '0,' then the size of the data X is -0.5<=X<0.5. Thus, in applying the exclusive OR EX to a condition code terminal of a program controller 10 via a selector 17, the discrimination of the size in the range above is executed only once.
申请公布号 JPS62271135(A) 申请公布日期 1987.11.25
申请号 JP19860115027 申请日期 1986.05.20
申请人 SONY CORP 发明人 KATO RYOHEI;KIKUCHI ATSUSHI
分类号 G06F7/02 主分类号 G06F7/02
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