| 摘要 |
PURPOSE:To prevent occurrence of an overrun with transfer of data by giving the priority to host device for control of data transfer against a lower device that can work in response to the data transfer capacity of the host device. CONSTITUTION:A host device 11 indicates an address of a data cache memory 16 of a lower device 13 to give an indication for writing or reading of data. A data transfer control circuit 4 gives information to a tag higher priority control circuit 14 from a tag higher priority control circuit 12 for transmission of data in case of the write mode data transfer. At the same time, the data are transmitted to a bus control circuit 6 via a bus control circuit 2. While the circuit 4 gives a request to the circuit 14 from the circuit 12 for transmission of data in case of the read mode data transfer. The circuit 4 receives the data read out of the memory 16 from the circuit 6 via the circuit 2. Thus a data transfer control circuit 8 gives report to the circuit 14 from the circuit 12 for reception of data. When the reception is ready for the next data, a request is given in the same way for transmission of the next data. |
