| 摘要 |
Performance of an auxiliary impulse commutated inverter is significantly improved by controlling the interval between gating an inverter auxiliary thyristor into conduction for commutation of a then-conductive inverter main thyristor and subsequently gating an incoming inverter main thyristor into conduction as a function of inverter load current. When inverter commutation is commenced, a timing signal generator is actuated, producing a rising amplitude timing signal.A comparator continuously monitors the amplitude difference between the timing signal and a preselected inverter reference firing delay interval signal which varies in accordance with inverter load current. When the amplitude of the timing signal and inverter reference firing delay signal are equal, a bistable trigger resets the timing generator and causes the inverter incoming main thyristor to be gated into conduction, ending the commutation interval. |
