| 摘要 |
PURPOSE:To speed up processing by cascade connecting the same circuit in multistage instead of leaving all processing to a computer and thereby dispersing load and making parallel processing. CONSTITUTION:An IC C consists of cells B and other data, and plural B are arranged. The cell B is constituted of cells A and other data, and plural A are arranged. Plural data are included in cells A as a basic pattern. Consequently, developing of cell data is made in form of data and xy coordinate operation etc. are made in parallel. Accordingly, development can be made in cycle of reading data nearly from a memory 3 and in the meantime, a host CPU can make next preparation, and processing capacity can be improved.
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