| 摘要 |
PURPOSE:To eliminate positive, negative noises by inputting an input signal to one of two D flip-flop multi-stage cascade connection circuits, inputting an inverted signal of the input signal to the other, and using an output of both the circuits for both inputs of a J-K flip-flop. CONSTITUTION:An input signal is branched into two; one enters a positive noise eliminating circuit C1 consisting of two stages of the D flip-flops and becomes a signal eliminating noise being at a high level, generated at a low level part and having a narrower width than the period of a clock CL, the other is inverted and enters a negative noise eliminating circuit C2 consisting of two stages of D flip-flops and becomes an inverted signal eliminating noise generated at a high level part, being at a low level and having a narrower width than the period of the clock CL. Both the signals are inputted respectively to J, K terminals to drive the J-K flip-flop 3 and an output signal eliminating both positive and negative noises is obtained. |
