发明名称 VOLTAGE CONVERSION CIRCUIT FOR CONVERTER
摘要 PURPOSE:To reduce power consumption with a simple and an inexpensive circuit without modifying a converter and lowering the performance, by exciting a bridge by a bipolar square pulse to control the proportion of an electric energization time in reduction. CONSTITUTION:A fixed cycle of bipolar intermittent square pulse with the amplitude value equal to a DC voltage VS is applied to a bridge 2 of a converter with a DC power source 1 and a switch 7 to lower an excited power at the converter by reducing the continuation time with respect to the quiescent time of the pulse. An output voltage of the converter during the continuation time of the pulse is held with a sample holding circuit 11 during the quiescent time of the pulse and filtered with a LPF5 to make an output signal. Moreover an A/D converter 6 is provided to converter the output signal into digital from analog and a pulse voltage with the peak value varying cyclically is applied to the converter, while a voltage value of a voltage with the peak value varying cyclically is supplied to the A/D converter 6 as reference voltage for A/D conversion.
申请公布号 JPS62266469(A) 申请公布日期 1987.11.19
申请号 JP19860109698 申请日期 1986.05.15
申请人 IWASAKI HIROYA 发明人 IWASAKI HIROYA
分类号 G01B7/16;G01D5/14;G01R17/12 主分类号 G01B7/16
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