摘要 |
PURPOSE:To obtain a Schmitt trigger circuit with less number of components by using a signal at an output terminal of the 2nd inverting circuit so as to apply conductive control to the 1st transistor (TR) thereby retarding the level change of the signal at the output terminal of the 1st inverting circuit. CONSTITUTION:When a potential of an input signal VIN is lowered and reaches a circuit threshold voltage VthC of a CMOS inverter 13, a P-channel MOS TR 11 starts conducting. A VOUT signal of an output node 18 of a CMOS inverter 17 is still at a high level and a TR 20 is conductive. Thus, the charging of an output node 14 of the TR 11 is disturbed by a path comprising TRs 19, 20 in addition to an N-channel MOSTR 12, and the time when a signal at the output node 14 of the inverter 13 reaches the circuit threshold voltage VthC of the inverter 17 is retarded. Then the substantial threshold voltage when the output VOUT signal is inverted to a low level is brought into a voltage lower than the circuit threshold voltage VthC of the CMOS inverter and a prescribed hysteresis characteristic is obtained. Further, the titled circuit consists of six MOS TRs in total.
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