| 摘要 |
PURPOSE:To suppress the latch-up phenomenon of a parasitic thyristor, by constituting the source region of a vertical type MOSFET as a resistor layers comprising two kinds of impurity layers, whose diffusion depths and concentrations are different, and forming these resistor layers in series with the source. CONSTITUTION:A P<+> layer 5 and a P base layer 6 are formed in an N<-> base layer 4, and a gate polysilicon layer 9 is formed on the N<-> base layer 4, both by an ordinary wafer process. A resist mask 29 for providing the metallic contact with the P<+> layer 5 is attached to an opening part. Thereafter As ion is implanted in order to form a first resistor layer 26 using the resist mask 29 and the gate polysilicon layer 9 in a self-alignemnt mode. P is continuously implanted in order to form a second resistor layer 27. After the resist mask 29 is removed, adequate annealing is performed. Since the diffusion coefficients of As and P are different, diffusion is performed in two stages. As a result, the two resistor layers 26 and 27 are obtained. |
