发明名称 TEST CIRCUIT
摘要 PURPOSE:To easily measure the quantity of delay of a delay circuit to be tested by obtaining a delay test signal from a test signal with a variable period, supplying the signal to the delay circuit to be tested, and comparing the phase of the output of the delay circuit to be tested with the phase of the test signal. CONSTITUTION:A rectangular wave signal with a period Tx is inputted from a test signal generating circuit through an input signal line 1. The period of an input signal when a phase comparator PC0 detects signals on an output signal line 3a and an input signal line 1 being in phase with each other is denoted as Ta. Similarly, when a coincident with PC1is obtained, it is denoted as Tb. Then, signals on output signal lines 3a-3f are delayed behind the signal on the input signal line 1 by a specific quantity. Therefore, respective phase comparators PC0-PC5 know terminals 5a-4f where in-phase signals are outputted and a high level is obtained, so that the delay time of the delay circuit DUU is tested.
申请公布号 JPS62265579(A) 申请公布日期 1987.11.18
申请号 JP19860109813 申请日期 1986.05.13
申请人 NEC CORP 发明人 HAGIWARA MISAO
分类号 G01R31/26;G01R31/28;H03K5/13 主分类号 G01R31/26
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