发明名称 CMOS OUTPUT BUFFER CIRCUIT
摘要 <p>PURPOSE:To attain the check of a short-circuited output terminal by inserting a non-doped nMOS transistor(TR) to a conventional CMOS output buffer circuit. CONSTITUTION:The non-doped nMOS TR 6 whose gate and drain are connected in common is inserted between an output terminal 4 and the power supply side pMOS TR 3 of a CMOS circuit comprising the series connection of an nMOS TR 2 and a pMOS TR 3. Enhancement MOS TRs are used for all the MOS TRs. The non-doped nMOS TR 6 is formed on the same substrate or a well as the nMOS TR 2 and the threshold voltage is negligibly small in comparison with that of the nMOS TR 2. The 'H' level of the output of the circuit is a value obtained by subtracting the threshold voltage of the nMOS TR 6 from the power voltage, but it is nearly equal to the power voltage practically.</p>
申请公布号 JPS62260426(A) 申请公布日期 1987.11.12
申请号 JP19860104055 申请日期 1986.05.06
申请人 NEC CORP 发明人 ORITA NOBUYUKI
分类号 H03K19/0948;G11C17/18;G11C29/00;G11C29/12;H03K19/003 主分类号 H03K19/0948
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