| 摘要 |
PURPOSE:To reduce an error of a multiplication circuit by adding the lower bit information that is cut when the multiplication output data is transmitted into the output data as the '1' addition signal which is decided in terms of probability to the contents of said lower bit information. CONSTITUTION:A multiplier 15 multiplies the data SSB received from a subtractor 4 by the 8-bit minute coefficient data SMI and transmits the 16-bit product data SMU. This data SMU consists of an integer part SIT of 8 bits and a decimal part SDC of 8 bits. The part SIT is inputted to an adder 12 to be added with the present value SPR inputted from a delay circuit 13 and turned into an output SPRX. This output is changed again into the new present value SPR via the circuit 13. While the part SDC controls the adder 12 in the form of the '1' addition control signal SCR via a carry control circuit 16. Thus it is possible to reduce an error caused by the out of the decimal part. |
