发明名称 Frequency division multiplexed analog to digital converter.
摘要 <p>In the described embodiment of the invention, a digital television receiver, having a line locked clock (CK), includes a first digital phase locked loop (232-252) which regenerates quadrature phase related subcarrier signals that are used to synchronously demodulate (232, 234) the chrominance signal components of composite video signals into color information signals. When nonstandard video signals (e.g., from a video tape recorder) are processed by the receiver, frequency instabilities in the line locked clock signal may cause the colour information signals to be distorted. To compensate for this distortion, a second phase locked loop (300) is synchronized to a reference signal generated by an analog oscillator (310). The analog reference signal is linearly added (314) to baseband analog video signals. The combined signals are digitized by an analog-to-digital converter (211) and then filtered by parallel low-pass and band-pass filters (301, 304) to develop digital signals representing the video signals and the reference signal, respectively. The digital reference signal is used to synchoronize the second phase locked loop (300), the control signals of which (from 320) are used to compensate (328) the first phase locked loop (232-252) for frequency instabilities in the clock signal. More generally, the invention envisages the use of a single analog-to-digital converter for digitizing combined analog signals (e.g. video and auxiliary signals) which occupy different frequency bands, the digitized signals being separated by filtering before being supplied to respective utilization or processing circuits.</p>
申请公布号 EP0245060(A2) 申请公布日期 1987.11.11
申请号 EP19870303969 申请日期 1987.05.01
申请人 RCA CORPORATION 发明人 BALABAN, ALVIN REUBEN;HARWOOD, LEOPOLD ALBERT;PATEL, CHANDRAKANT BHAILALBHAI;DEMMER, WALTER HEINRICH
分类号 H04N5/14;H04N9/64;H04N11/04 主分类号 H04N5/14
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