发明名称 Darlington type switching stage for a line decoder of a memory
摘要 A switching stage receives two levels at its input, i.e. a high selection level and a low non-selection level. The Darlington stage (T1, T2) supplies at its output (E) a high current in the selected mode and a considerably smaller current in the non-selected mode. In order to accelerate the evacuation of charges accumulated in the base of T2 and hence the deselection time of the stage, an auxiliary current source (I), is connected to a point A. Between the base (B) of the transistor T2 and the point A two diodes (D1, D2) are connected in series in the forward direction. Between the emitter (E) of T2 and the point A a diode (D3) is connected in the forward direction. In the selected mode, the major part of the current I passes through D1, D2 and this current permits the evacuation of the charges from the base of the transistor T2 when the stage is deselected.
申请公布号 US4706222(A) 申请公布日期 1987.11.10
申请号 US19860852052 申请日期 1986.04.15
申请人 U.S. PHILIPS CORPORATION 发明人 KWIATKOWSKI, JEAN-CLAUDE;IMBERT, GUY
分类号 H03K17/60;G11C8/08;G11C8/10;G11C11/415;H03K17/615;(IPC1-7):G11C11/40 主分类号 H03K17/60
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