发明名称 WRITE CONTROL SYSTEM FOR EEPROM
摘要 <p>PURPOSE:To decrease the probability of erroneous write by providing a permission signal output means for outputting a permission signal to be active for a prescribed period when prescribed data is given to apply write control of the EEPROM. CONSTITUTION:An address decoder 2 makes a chip select signal CE2 active based on given address data and a write window circuit 3 fetches data from a data bus 23, and when the data is prescribed data, the permission signal 24 is made active for a prescribed period T. In writing data in the EEPROM 1, a memory write-enable signal WE1 is made active and an AND circuit 4 makes an output signal 25 active (L level). The active signal is given to a write-enable terminal WE of the EEPROM 1, the conditions of the signal controlling the write are all satisfied by the EEPROM 1 and the data of the data bus 23 is written on the address on the EEPROM 1 represented by the address data of the address bus 21.</p>
申请公布号 JPS62257700(A) 申请公布日期 1987.11.10
申请号 JP19860101015 申请日期 1986.05.02
申请人 TOSHIBA CORP 发明人 NONAKA JUICHI
分类号 G11C17/00;G11C16/02 主分类号 G11C17/00
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