| 摘要 |
PURPOSE:To use a long transmisson line by generating a reception shaping clock at the reception side and controlling the phase by the reception signal in receiving the data sent to a parallel transmission line in the same timing. CONSTITUTION:A clock generating source 9 and a phase controller 10 are provided to the reception side. The controller 10 is connected to data transmission lines 5-1-5-n to identify the minimum and maximum reception signal delay, applies phase comparison between each data and the output pulse of the source 9 over the range of their existence to control the phase of the clock fed to reception side flip-flops 3-1-3-n. The phase controller 10 consists of a phase comparison section 11, a loop filter section 12 receiving an enable signal representing the effectiveness of an output signal from the phase comaprison section 11 and a signal representing the lead/lag of the clock phase, and a phase shift section 13 shifting to lead or lag the phase of the generated clock by using the control signal from the loop filter section 12. |
