| 摘要 |
This set-up serves to produce a clock signal of constant frequency, 10 Hz for example, which signal is drawn from the frequency of the mains, which may be 50 or 60 Hz for example. The set-up includes a diode D1, D2 which is connected in one direction or the other, depending on the mains frequency, between an integrated circuit pin P and earth. Depending on the set-up of the diode D1, D2, the positive half-cycle or the negative half-cycle of the mains voltage is used to render passing one or the other of the two branches 1, 2 of a so-called mirror current circuit containing two transistors T1, T2 and followed by two frequency demultiplier stages FF1, FF2. The invention is applicable in particular to integrated circuits. <IMAGE>
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