发明名称 SEMICONDUCTOR LOGIC CIRCUIT
摘要 PURPOSE:To obtain a desired input threshold level without increasing the occupied area by changing the base potential of a P-channel or an N-channel MOS transistor (TR) constituting a CMOS inverter. CONSTITUTION:The base potential (P-well region potential) of the 1st N-channel MOS TR 3 or that of the 1st P-channel MOS TR 2 in the CMOS inverter circuit comprising the 1st N-channel MOS TR 3 and the 1st P-channel MOS TR 2 is made variable by using the 2nd P-channel MOS TR 4 and a resistor 5 or the 2nd N-channel MOS TR 4' and a resistor 5'. Thus, the input threshold level of the inverter circuit is controlled and a desired input threshold level is obtained without increasing the occupied area on a chip.
申请公布号 JPS62254522(A) 申请公布日期 1987.11.06
申请号 JP19860099983 申请日期 1986.04.28
申请人 NEC CORP 发明人 DENDA AKIRA
分类号 H03K19/0948;H01L21/8238;H01L27/092;H03K19/00 主分类号 H03K19/0948
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