Voltage-protected semiconductor arrangement

摘要

A semiconductor arrangement is proposed which is equipped with integrated resistors (6) and is protected against overvoltages, undervoltages and polarity reversal. The integrated resistors (6) are accommodated insulated in a resistance well (41), the resistance well being connected to a supply voltage line via the emitter-collector junction (15, 14) of a transistor operated in saturation. In the protection case, in contrast, the transistor is in the non-conducting state. <IMAGE>