| 摘要 |
PURPOSE:To easily execute an IC by controlling the interpolating circuit of plural channels by respective signal through rates of plural channels with one holding signal generating circuit. CONSTITUTION:The circuit is composed of threshold setting circuits 5L and 5R to filter the output intermediate high area component of the interpolating circuit of plural channels and obtain a threshold signal for plural channels from the signal to detect this, one integration circuit 4 provided commonly at plural channels and a pulse width variable circuit 3 to compare the output signal of the integration circuit 4 and the threshold signal for plural channels, obtain an interpolating control signal for plural channels of a pulse width in accordance with respective signals and variable-control the interpolating width. In a holding signal generating circuit 2, threshold signals (g) and (h) of both channels and an integrating signal (f) of the integration circuit 4 are compared, and an L channel holding signal (interpolating control signal) K and an R channel holding signal (interpolating control signal) (l) are obtained. Thus, it is sufficient to provide only an integration circuit at both channels commonly, IC can be easily executed and the optimum interpolating action can be executed for respective channels.
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