| 摘要 |
PURPOSE:To obtain a second address transition detecting pulse in which both edges of a fall and a rise are steep and the pulse width can be correctly controlled by synchronizing and making variable the impedance of the load element of the second address transition detecting circuit to the change of an address. CONSTITUTION:When a load impedance control signal line 24 comes to be an 'L' level, the impedance of a load element 21 comes to be very low, and the second address transition detecting signal line 22 is quickly charged through the load element 21 and comes to be rapidly an 'H' level. Namely, when the second address transition detecting signal line 22 should discharge, the impedance of the load element 21 is highly set and when the line should charge, the impedance of the load element 21 is lowly set. Thus, both the fall and rise of the second address transition detecting pulse 9 are steep, and the pulse width can be correctly controlled by the pulse width of the first address transition detecting pulse 5 and a load impedance control circuit 23.
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