| 摘要 |
As integrated field effect devices are scaled to smaller dimensions, the electric field in the channel increases for a constant operating voltage. This induces "hot electron" effects that reduce device reliability. The present invention reduces the voltage (and hence electric field) across one or more transistors in various complementary (e.g. CMOS) logic circuits. This is achieved while still obtaining a full logic swing (e.g., 0-5 volts) at the output of the logic. The technique also allows the retention of previous voltage levels (e.g., 5 volts) for operation of other portions of the integrated circuit (e.g., dynamic memory cells).
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