| 摘要 |
PURPOSE:To reduce the number of wirings and to reduce the communication time loss by transmitting data in a packet form including respective addresses of controlled system circuits by a common parallel bus and using an interruption to process the response from circuits. CONSTITUTION:Respective addresses peculiar to all controlled system circuits 10 on a parallel bus are added to controlled variable data of a motor 3 which a computer CPU 6 calculates, and this data is transmitted as 16-bit transmission data in a packet form. The address part is collated by a decoding circuit 21, and data is supplied to the motor 3 when coincidence is detected. A stroke signal outputted together with data of the angular position of the motor 3 which is detected by an encoder 24 and a potentiometer 29 is given to a control line 9 and is connected to not only a read signal line of a register 30 but also an interrupt signal line of the CPU 6, and data is read in by the interruption processing.
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