| 摘要 |
PURPOSE:To reduce the data write time on an EPROM cell by providing a write means for writing simultaneously plural data from an input terminal to different addresses. CONSTITUTION:An address signal of an address (even-number address) to be written is applied to address signal input terminals A0, A1-A12 in an integrated circuit device incorporating a read-only memory (EPROM). The data signal to be written on the said addresses is applied to the 1st data signal terminals D0, D1-D7, a data signal written on an address increased by 1 from the said addresses is applied respectively to the 2nd data signal terminals D8, D9-D15. When an output L is applied to a write signal terminal PGM, a write circuit 141 reads the data of the 1st data signal terminals D0, D1-D7 via the 1st data signal input/output circuit 19 and a data signal line 20, written on the EPROM cell of an even-number address through a signal line P0, a write circuit 140 reads the data of the 2nd data signal terminals D8, D9-D15 via the 2nd data signal input circuit 21 and a data signal line 22 and written on the EPROM cell at the said even number + 1 address through the signal line P1. |
