发明名称 CURRENT ABSOLUTE VALUE CIRCUIT
摘要 PURPOSE:To decrease a variance of a bias current, and also, to improve a temperature characteristic by connecting a common terminal of a current mirror circuit to a reference voltage, and connecting a base of the first transistor to a bias voltage source. CONSTITUTION:Emitters of an npn transistors TR Q2 and Q3 of a current mirror circuit which has been constituted of the TR Q2 and the TR Q3 are connected in common and become a common terminal, and connected, and a collector of the TR Q2 becomes an output terminal. Also, a bias voltage source is constituted of an npn transistor TR Q4 and resistance R1, R2, and a constant-current source I1, and an emitter of the TR Q4 and the resistance R2 are connected in common and connected to the reference voltage source. Also, a base of the first transistor npn TR Q1 is connected to a collector of the TR Q4 being an output of the bias voltage source. In this way, the common terminal of the current mirror circuit is connected to the reference voltage, and also, the base of the TR Q1 is connected to the bias voltage source, therefore, a variance of a bias current can be decreased, and also, a temperature characteristic can be improved.
申请公布号 JPS62248017(A) 申请公布日期 1987.10.29
申请号 JP19860093618 申请日期 1986.04.22
申请人 NEC CORP 发明人 NISHIMURA KOICHI
分类号 G05F3/26;H03F3/34;H03F3/343 主分类号 G05F3/26
代理机构 代理人
主权项
地址