| 摘要 |
PURPOSE:To increase the pull-in speed in comparison with the control of synchronism done by the mere advance and delay of phase, by obtaining the output proportional to the phase error value and carrying out the control of synchronism in a digital phase synchronizing circuit. CONSTITUTION:The output pulse width of an exclusive OR 12 is increased and decreased in proportion to the phase error between the outputs of an input signal source 1 and a dividing circuit 11. Thus the time of said output pulse width is counted by a phase error quantizing counter 13 and the offset value (count value equivalent to pi/2) is subtracted by a subtractor 14 to send the positive value a1 and the negative value b1 to an accumulation computing element 15 with an advance mode and a delay mode respectively. Then the advance control signal a2 and the delay control signal b2 are sent to a time base control circuit 3 from deciding circuits 8 and 9 when the output of the unit 15 is equal to double as much as the initial value and to 'O' respectively. Thus the computing element 15 is reset to its initial value. Therefore the time base control is frequently carried out when the phase error is large. Then the pull-in speed is increased. |
