发明名称
摘要 PURPOSE:To reduce the overall current consumption of an intermediate frequency amplifier by setting the number of stages of the amplifier to a fixed value. CONSTITUTION:Differential amplifiers composed of transistors Q1 and Q2 are connected by n stages in series to form an intermediate amplifier. In this case, overall current consumption I is minimum when the gain of each stage is approximate 8.7dB. Therefore, when needed total gain G is 86.8dB, providing ten stages of differential amplifiers (n=10) minimizes the overall power consumption. Further, when the current consumption is allowed until +20% of the minimum, the number of stages n is between 6 and 19. However, there is no need to increase the number of stages innecessarily and n is set to six. Namely, the number of stages n is set to the minimum within the range where needed total gain G can be obtained. Thus, the number of stages is set first shile attention to the desired total gain is paid and then the total gain is obtained by this number of stages, so that the overall current consumption can be reduced.
申请公布号 JPS6251004(B2) 申请公布日期 1987.10.28
申请号 JP19790030428 申请日期 1979.03.15
申请人 SONY CORP 发明人 OKASHIN YAMATO
分类号 H03F3/04;H03F1/02;H03F3/34;H03F3/343;H03F3/347 主分类号 H03F3/04
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