发明名称
摘要 PURPOSE:To secure the previous oscillation for the oscillation frequency of the voltage control oscillator at the reception side at the point near the standard oscillation frequency by giving the control to the circuit which monitors the input signal frequency at the transmission side, thus reducing the time for set-up of the clock synchronism. CONSTITUTION:Clock pulse fL sampled out of the multiplexed signal is applied to n-notation ring counter 2 to generate the clock pulse which is used for writing of the multiplexed signal into buffer memory 3. And the multiplexed signal is memorized temporarily in memory 3. At the same time, the output of gate circuit 5 which prevents memory 3 from becoming empty is applied to n-notation ring counter 4 in order to generate the clock pulse for reading the data written into memory 3. Then FF1 is provided to the circuit, and reading clock pulse PR sent from counter 4 is applied to terminal C of FF1. And writing pulse PW sent from counter 2 is applied to terminal D along with the control signal, and stuff information bit signal S1 is delivered through output terminal Q to make the oscillation frequency of the voltage control oscillator of the reception side approximate to the standard oscillation frequency.
申请公布号 JPS6251012(B2) 申请公布日期 1987.10.28
申请号 JP19790053028 申请日期 1979.04.28
申请人 NIPPON ELECTRIC CO 发明人 MORIMOTO HIDEAKI
分类号 H04L7/00;H04J3/07;H04L7/033 主分类号 H04L7/00
代理机构 代理人
主权项
地址