| 摘要 |
PURPOSE:To obtain an analog/digital converter of feedback pulse width modulatin system having no two-digit error by using a clock synchronizing with one edge of a pulse width modulation signal as a count clock. CONSTITUTION:A clock is frequency-divided into 1/N by a frequency divider FD and fed to a set terminal S of a switch control logic circuit SWC. The logic circuit SWC, the switch SW, an integration device IG and a comparator COP form a closed loop, and the loop system, although being a discontinuous system, gives negative feedback and the pulse width modulation output is subjected to modulation by an analog input EX. A pulse width modulation signal PWM is fed to a gate circuit GC, and an oscillated output of a clock oscillator OSC passes through the gate circuit GC while the level of, e.g., the PWM signal is logical '1'. A digital data obtained from a counter COU is extracted corresponding to the value of the analog input EX to be converted.
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