发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To obtain high threshold voltage even when the dosage of channel doping is low by a method wherein the threshold voltage of an MISFET is controlled by the selection of conductivity type of the semiconductor layer, which constitutes a gate electrode, and the doping of a channel. CONSTITUTION:The word wire WL1 provided on a gate insulating film 3 consists of a p-type semiconductor layer 4 and the high melting point metal silicide provided on the layer 4. On the other hand, n<+> type semiconductor regions 8 and 9 are provided in a semiconductor substrate 1. MISFET Q1 and Q2 are formed using the word wire WL1, the regions 8 and 9 as a gate electrode, a source electrode and a drain region. In this, case, as the word wire WL1 is constituted using the layer 4, the difference in the work function between the gate electrode and the substrate 1 can be made larger when compared with the case wherein an n-type semiconductor layer is used instead of the layer 4. Accordingly, the dosage of the channel doping can be reduced in the amount of increase in the above-mentioned difference. As a result, the deterioration in characteristics of the FET Q1 and Q2 can be prevented effectively.
申请公布号 JPS62245658(A) 申请公布日期 1987.10.26
申请号 JP19860087927 申请日期 1986.04.18
申请人 HITACHI LTD 发明人 KOMORI KAZUHIRO;TAKEDA TOSHIFUMI
分类号 H01L21/8246;H01L27/10;H01L27/112 主分类号 H01L21/8246
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