发明名称 SOFTWARE DELAYING SYSTEM FOR DATA PROCESSOR
摘要 <p>PURPOSE:To improve accuracy, by counting the number of times to execute a specific instruction by a CPU within a prescribed time at an initial start up time, storing a counted value, and setting a software delay time based on the counted value as far as a program is concerned. CONSTITUTION:A programmable timer 4 operated by the clock phi1 of a CPU 3, and an independent clock phi2 is provided, and it is made possible to set a timer time T from the CPU 3, and its output is connected to the interruption terminal INT of the CPU 3. And at the initial start up time, the number of times of a NOP instruction executed by the CPU 3 is counted by the timer 4 for the time T, and a counted value N is stored at a part of a main storage device 1 as the reference value of the software delay time, and on the program P2 of a floppy disk 7, the software delay time is set on the basis of the reference value N.</p>
申请公布号 JPS62245338(A) 申请公布日期 1987.10.26
申请号 JP19860088923 申请日期 1986.04.17
申请人 SANYO ELECTRIC CO LTD 发明人 TAKAGI YOSHIAKI
分类号 G06F1/08;G06F1/14;G06F9/06;G06F9/30;G06F9/48 主分类号 G06F1/08
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