| 摘要 |
PURPOSE:To perform detailed memory control and to shorten the time required to generate an address by inputting a selected address signal and removed part of an address signal outputted by a CPU to a page table and then generating a physical address signal. CONSTITUTION:A multiplexer 8 is so constituted as to select the high-order address signal AD11 outputted by a CPU 11 when a switching signal S1 is '0' or an address signal AD14 outputted by a segment memory 7 when the switching signal S1 is '1', and the address signal selected here is supplied as an address signal AD15 to a page memory 9. The page memory 9 uses the page table to generate an address signal AD16 from the address signal AD15 and an intermediate address signal AD12. Then, the physical address signal AD17 is generated by using this address signal AD16 and the of the same page of low-order address signal AD13 outputted by the CPU 11.
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