发明名称 RESETTING SYSTEM FOR MULTIPROCESSOR SYSTEM
摘要 <p>PURPOSE:To reset processors communicating mutually without resulting the runaway, etc., of the processor, by constituting a system so that a subordinate processor is reset automatically by the resetting of a host processor. CONSTITUTION:A processor 1 is connected to another device and a data bus BUS1, and performs a data transmission process by communicating to processors 2 and 3. Also, the processors 2 and 3 performs communications to processors 4 and 5, and processors 6 and 7 respectively, then performing the data transmission processes. Reset control for the processors 4 and 5 are performed by the processor 2, and the reset control for the processors 6 and 7, by the processor 3, and the reset control for the processors 2 and 3, by the processor 1.</p>
申请公布号 JPS62245362(A) 申请公布日期 1987.10.26
申请号 JP19860089114 申请日期 1986.04.17
申请人 NEC CORP 发明人 ISHIKAWA YUJI
分类号 G06F15/16;G06F15/177 主分类号 G06F15/16
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