发明名称 CODE GENERATING CIRCUIT
摘要 PURPOSE:To obtain an optional pattern code generating function by constituting a repetitive pattern generating circuit by a FIFO and a simple gate element. CONSTITUTION:A pattern record is outputted from a microcomputer MCP 1 by one word and inputted to a buffer memory 3 via a changeover circuit section 2, then an output ready signal is sent from the memory 3. Then a code is extracted from an output clock, the output of an AND gate 2a goes to '1' by the 1st bit, the circuit section 2 is changed over into a memory loopback loop 6 and the code is inputted again to the memory 3. Thus, the same data is outputted repetitively. Then the output of the AND gate 2b goes to '1' by using the pattern code including the end, the loop 6 is disconnected and the pattern code is outputted via a P/S conversion section 5.
申请公布号 JPS62243428(A) 申请公布日期 1987.10.23
申请号 JP19860087419 申请日期 1986.04.15
申请人 NEC CORP 发明人 TSUJITA TAKESHI
分类号 G06F5/00;H03M9/00 主分类号 G06F5/00
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