发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To execute the same program even in case of a device whose instruction executing time is different, by starting the next instruction executing means after waiting during the time which has been designated by a timing adjusting instruction, and thereafter, ending the timing adjusting instruction. CONSTITUTION:A bus access control circuit 10 interprets a timing adjusting instruction which has been sent through a bus 5 and has been fetched by a CPU 2, and starts a microprogram control circuit 11. By said instruction, the circuit 11 sets a designated waiting time and a waiting request to a waiting circuit 13. Unless an instruction of a waiting inhibition is set to the circuit 13, an interruption request signal is transferred from the circuit 13 to the circuit 11. The circuit 11 processes an interruption request and waits for the end of the waiting time. When the designated time for waiting elapses, the circuit 13 sends a signal to the circuit 11, and the circuit 11 executes read-out of the next instruction. When the instruction of a waiting inhibition is given to the circuit 13, the timing adjusting instruction is not executed, and immediately the next instruction is executed.
申请公布号 JPS62243031(A) 申请公布日期 1987.10.23
申请号 JP19860085872 申请日期 1986.04.16
申请人 NEC CORP 发明人 MAKITA AKIHISA
分类号 G06F9/30;G06F9/22 主分类号 G06F9/30
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