发明名称 MAXIMUM LIKELIHOOD DECODER
摘要 PURPOSE:To attain the maximum likelihood decoding with less deterioration in the performance by using a Trellis chart so as to simplify addition/ comparison/selection processings thereby quickening the decoding processing. CONSTITUTION:Signals I, Q sent by the orthogonal amplitude modulation and added with factor of deterioration such as noise are subject to the path likelihood clecision 1, and m-set of states before one symbol time reaching the state of time-n in the Trellis chart and n-set of path likelihood from the maximum value are selected (2a, 2b). The combination of addition/comparison/selection is decided (4) by referencing the content of X memories 3a, 3b depending which state and path are to be selected, the addition/comparison/selection as to the combination only are processed (5) and the remaining path is stored in the memory 6. Then the obtained state likelihood is subject to normalization 7, the maximum value is stored in the X memories 3a, 3b in this process, and the remaining path information is used to reverse the path by the stop length, the tracing state of the coder and its output are estimated at the time, and the redundancy bit of the final estimated output is erased (8) to obtain a decoding output.
申请公布号 JPS62243430(A) 申请公布日期 1987.10.23
申请号 JP19860085982 申请日期 1986.04.16
申请人 HITACHI LTD;HITACHI DENSHI LTD 发明人 KOBAYASHI NAOYA;ONISHI MAKOTO;KOKURYO GARO
分类号 H03M13/23 主分类号 H03M13/23
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