发明名称 LOGIC CIRCUIT
摘要 PURPOSE:To obtain a three-state output circuit which has a small load on a control circuit by incorporating a cutting-off circuit composed of a TTL gate circuit which has the 1st output for turning off an off-buffer circuit and the 2nd output for turning off an output transistor(TR). CONSTITUTION:The phase division stage TR, off-buffer circuit, output TR, etc., of the TLL circuit are composed of TRs Q1-Q4 and resistances R1-R5. Further, the collector of the phase division stage TR Q6 of the TLL gate circuit having an input circuit composed of a PNP TR Q5 is connected to the collector of the phase division stage TR Q1 and the collector of the output TR Q7 of the TLL gate circuit is connected to the base of the output TR of the TTL circuit. Consequently, the value of a current flows to a control input terminal is made much less than that of a conventional circuit and weight as the load on the three-state control circuit is improved greatly.
申请公布号 JPS62239721(A) 申请公布日期 1987.10.20
申请号 JP19860083533 申请日期 1986.04.11
申请人 NEC CORP 发明人 KIYOZUKA NOBORU
分类号 H03K19/0175;H03K19/082;H03K19/088 主分类号 H03K19/0175
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