| 摘要 |
PURPOSE:To reduce a price of a pellet by increasing a latchup withstand strength by arranging at least either of the maximum impurity concentration regions of P-well and N-well of a compensate field effect transistor between the center part and the deepest part in a cross-sectional direction of the wells. CONSTITUTION:Boron ions are implanted in an N-type semiconductor substrate 1 to form a P-well 2 and phosphorus ions are implanted to form an N-well 3. After ion implantation, a heat treatment is made for 60 min at 1000 deg.C. An isolation oxide film 4 formed by selective oxidation, a gate electrode 5, source and drain diffusion layers 6 and 7, and an A wiring 11 are formed, thereby composing a CMOS IC having a peak of impurity concentration at the bottom of a well. For controlling the concentration at a well surface, two times of ion implantation, those of high energy and low energy are also effective. Fur ther, for controlling a threshold voltage of a transistor, channel doping after forming a gate oxide film is also useful. |
