| 摘要 |
PURPOSE:To shorten the time required for detecting abnormalities in terms of a device supervising the delay caused by a processor when it executes an instruction by supervising the state of executing the instruction with different instruction execution times as references. CONSTITUTION:It is assumed that first a signal XF is generated when an ADD1M starts execution, after which the reading of the counter 3 is decremented in synchronization with a clock signal CK. The output signal CT of the counter 3 indicates '0' when the execution of the instruction ends. When the execution of a next instruction starts, the number of maximum steps in accordance with the type of instruction is set again. If an error signal ER is outputted when the value of the signal CT is below '0', an error signal generator 4 can deal with the error right after the microprogram with the maximum number of steps is executed. Thus an abnormal action time can be shortened, and the instruction execution can be surely supervised.
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