发明名称 FET DRIVING CIRCUIT FOR CONVERTER
摘要 PURPOSE:To actuate an FET securely without any time delay even if an input source voltage is low by connecting an inductance, a current limiting resistance, and a reverse current stopping diode in series as the collector load of an input transistor(TR). CONSTITUTION:When the input TR 20 turns on by receiving a pulse output from a PWM pulse oscillator 18, a current flows to the input TR 20 through the current limiting resistance 21, inductance 22, and diode 23 of a driving voltage generating circuit 24. Then, when the pulse signal from PWM pulse oscillator 18 is cut off and then the input TR 20 turns off, the current flowing through the inductance 22 of the driving voltage generating circuit 24 is cut off to generate a counter electromotive voltage at the inductance 22, and the counter electromotive voltage is applied to the gate of the FET 15, whose gate capacity is charged speedily through a diode 23 to switch on the FET 15, thereby supplying a driving current to the primary winding 17 of a transformer 16.
申请公布号 JPS62239718(A) 申请公布日期 1987.10.20
申请号 JP19860083666 申请日期 1986.04.11
申请人 ELCO- KK 发明人 ODA SEIJI
分类号 H03K17/687 主分类号 H03K17/687
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