| 摘要 |
<p>PURPOSE:To exclude the malfunction of a semiconductor integrated circuit due to the irregular clock signals produced in a start mode, by preventing transmission of those unmatched clock signals to the entire part of the integrated circuit. CONSTITUTION:When a clock start control signal (d) changes to an L level from an H level, both a drive clock generating circuit 1 and a counter 4 are started together with a clock transmitting circuit 5 reset. The circuit 1 produces the irregular clocks in a start mode (Fig. a). The counter 4 counts these unmatched clock signals and then produces an overflow signal when receiving the clock signal having the number of pulses in response to the number of steps of a flip-flop constituting the counter 4 (Fig. b). The circuit 5 is set by the overflow signal (b), i.e., the reset mode of the circuit 5 is released and the circuit 5 transmits the clock signals to the entire part of a semiconductor integrated circuit when the circuit 5 is set in a normal state (Fig. c). At this time point the unmatched clock signals are completely eliminated and therefore no malfunction is produced with the semiconductor integrated circuit.</p> |
