| 摘要 |
<p>PURPOSE:To secure the secrecy of data on a EEPROM by using a circuit which writes a memory cell transistor Q and inhibits the read of the EEPROM of this circuit constitution. CONSTITUTION:When an EE memory cell transistor Q is written, the output node N of a sense circuit 3 is set at 'L'. Thus the signal OD received from an inverter circuit 6 is set at 'L' even though the read control signal OD' of an EEPROM is kept at 'H'. Then the data output is set in a high impedance state and the read of the EEPROM is inhibited. In order to write the transistor Q to inhibit the read of the EEPROM, a control circuit 4 is actuated so that the gate of the Q is set at OV and the drain of the Q is set at a high voltage level by bias circuits 1 and 2. Furthermore the Q can be erased for permission of the read of the EEPROM.</p> |
