发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To enable application of the substrate voltage of memory circuit from a substrate voltage generating circuit through high impurity concentration layers and a conductive layer provided on the surface of a semiconductor substrate by a method wherein high impurity concentration layers are formed around the memory circuit, and the output part of the substrate voltage generating circuit and the above-mentioned high impurity concentration layers are connected through the conductive layer. CONSTITUTION:Memory circuit 2, a substrate voltage generating circuit 5 to apply a reverse bias between the bit lines of the memory circuits 2 and a semiconductor substrate 1 of one conductivity type, and high impurity concentration layers 3 formed around the memory circuit 2 and having the same conductivity type as that of the semiconductor substrate 1 are provided in the prescribed region on the semiconductor substrate 1, and the output part of the substrate voltage generating circuit 5 and the high impurity concentration layers 3 are connected by a conductive layer 4. For example, the high impurity concentration layers 3 having the same conductivity type of that of the substrate 1 are formed on the silicon substrate 1 by selective thermal diffusion so as to be deeper than the impurity layers of the sources, drains, etc., of the transistor. After then, or at the time of formation of the impurity layers 3, the memory circuit 2, the substrate voltage generating circuit 5, etc., are formed, and the impurity layers 3 and the output part of the substrate voltage generating circuit 5 are connected by the wiring 4 in the metal wiring process.
申请公布号 JPS62235772(A) 申请公布日期 1987.10.15
申请号 JP19860079761 申请日期 1986.04.07
申请人 MATSUSHITA ELECTRONICS CORP 发明人 TSUURA KATSUHIKO;TERAKAWA SUMIO
分类号 H01L27/10;H01L21/822;H01L21/8242;H01L27/04;H01L27/108 主分类号 H01L27/10
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