发明名称 GATE ARRAY INSTRUCTION PREFETCH UNIT
摘要 Symbolic processing method and system. A microprogrammable processor carryies out compiled functions in accordance with a predetermined series of macroinstructions and a main memory stores macroinstructions therein and communicates with the processor over a bus. A unit is disposed in the processor for prefetching a plurality of successive macroinstructions from the main memory at the initiation of a new compiled function including a plurality of instruction buffer registers (111, 112, 113) for storing the macroinstructions and which refills the buffer registers with successive macroinstructions as the buffer registers become empty.
申请公布号 AU7110487(A) 申请公布日期 1987.10.15
申请号 AU19870071104 申请日期 1987.04.06
申请人 SYMBOLICS, INC. 发明人 BRUCE E. EDWARDS;RONALD J. LEBEL
分类号 G06F9/28;G06F9/22;G06F9/38;G06F9/44 主分类号 G06F9/28
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