发明名称 DC COMPENSATION CIRCUIT
摘要 PURPOSE:To easily obtain an ideal DC compensation characteristic even to an ultrahigh speed pulse signal by detecting a positive/negative pulse peak value and adding a DC voltage corresponding to the peak value to an input pulse train. CONSTITUTION:The DC level fluctuation P is equal to the peak value of a pulse measured from a DC reference level. Thus, a peak value detection circuit 13 detects the peak value of the pulse and after the detected output is amplified up to a proper level by a DC amplifier 14, an adder circuit 15 adds the result to a main signal so as to apply DC compensation to the master signal. A peak value detection circuit 13 consists of an input buffer 41 and a rectifier circuit 42, and a broad band characteristic and a low output impedance characteristic are called for the input buffer 41, but since the path is not used as the main signal path, the requirement is not so much severe In order to detect a negative peak P', the connection of the diode 43 has only to be reversed.
申请公布号 JPS62233921(A) 申请公布日期 1987.10.14
申请号 JP19860075945 申请日期 1986.04.02
申请人 NEC CORP 发明人 IWAGAMI TAKUYA
分类号 H03K5/007;H03K5/00;H03K5/08;H04L25/06 主分类号 H03K5/007
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