| 摘要 |
A thermal stress resistant chip carrier includes a housing (11), semiconductor chips (13) mounted on a substrate (12), and a plurality of electrical terminals (36) which extend through one or more walls (21, 22, 23, 24) of the housing (11). Each terminal (36) has an inner resilient portion (36b) connected to a contact pad (32) in electrical engagement with a semiconductor chip. These portions (36b) are directly connected to the pads (32) so that as the substrate (12) expands and contracts according to temperature variations, the inner resilient portions (36b) move accordingly, thereby eliminating harmful stresses. A non-conductive, flexible, electrical interconnection member may also be provided for electrically connecting the semiconductor chips to the terminals (36). <IMAGE> |
