| 摘要 |
The arithmetic pipeline processor (which is used for computer graphics such as a flight simulator) is a group of boards capable of solving an equation of the form AmBn+CoDP+EqFr+GsHt where A, B, C, D, E, F, G, H are 32-bit implied one floating point numbers, and m, n, o, p, q, r, s, t can take on the values 1/4, 1/2, 1, 2 and 0. It includes a digital logarithmic calculator using shifters and stored tables to perform arithmetic functions such as multiplication, division, squares, square roots, and fourth roots. It comprises two input ports each capable of receiving digital data N bits wide. Included are a log transform unit, a log sum or difference unit and an antilog unit. Following these is an M-bit Aritmetic Logic Unit (ALU) and circuitry for converting between fixed point and floating point numbers. It uses piece wise linear approximation in conjunction with stored slope information in tables to do the transform calculation of logarithms and antilogarithms. The M-bit arithmetic unit performs accumulation of up to K terms. In a specific emodiment, N=32, M=36, and K=128. Note that a pipeline processor has no central processing unit or software in itself, but it may interface with a computer for inputs and outputs including control information.
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