发明名称 PROCESSING REQUEST TRANSMISSION EQUIPMENT
摘要 PURPOSE:To attain an optimum throughput to the system by setting, from a processor, the allowable waiting time data for a processing request, and transmitting an emergency signal when the waiting exceeds the allowable value. CONSTITUTION:When a write instruction signal 11 to a register 1 is designated by a processor the content of a write data (the allowable waiting time data) 12 is taken in the register 1. Then, if a processing request signal 10 is in '0' or is an acknowledgement signal 16 is returned from other equipment as a response to the signal 10, '1' is supplied to the L-terminal of a counter 2 and the content in the register 1 i.e. the allowable waiting time data 13 is set in the register 2. If there is no response of the signal 16 to the signal 10 and the value of the counter 1 reaches '0', a signal 21 is outputted to let an AND-gate output 25 turn the output 15 of a flip-flop 3 in '1'. If the output 15 is '1' and the signal 10 is in '1', the emergency signal 20 i.e. the output of an AND circuit 6 is transmitted.
申请公布号 JPS62232059(A) 申请公布日期 1987.10.12
申请号 JP19860075805 申请日期 1986.04.01
申请人 NEC CORP 发明人 ISHIBASHI FUMIAKI
分类号 G06F13/362;G06F13/14 主分类号 G06F13/362
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