发明名称 CPU
摘要 PURPOSE:To efficiently execute the changing-over of a bank and to directly manage a memory bank by building a bank data register in a CPU and time- dividing and outputting bank data. CONSTITUTION:A multiplexer 13 selects and outputs either of the data on an internal address bus 16 of a CPU1 and the data on a bank data bus 18. Here, the data on the bus 18 are the bank data to hold a memory bank register 14. The selecting action of the multiplexer 13 is time-divided and controlled by a selecting signal 17 from an address bank bus control circuit 15 based upon a bus cycle. Namely, onto an address bank bus 12, the address and the bank data on the internal address bus 16 are time-divided and outputted. Thus, the changing-over of the bank can be efficiently executed and the memory bank can be directly managed.
申请公布号 JPS62231348(A) 申请公布日期 1987.10.09
申请号 JP19860073496 申请日期 1986.03.31
申请人 TOSHIBA CORP;TOSHIBA MICRO COMPUT ENG CORP 发明人 TAMURA ICHIRO
分类号 G06F12/06 主分类号 G06F12/06
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