发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To decrease power consumption by providing a storage means selection transistor (TR) and an output node discharge TR to both ends of a data storage means and by applying conduction control corresponding to a precharge period. CONSTITUTION:At the time of an output node 11 is precharged by a signal phiP,a signal B2 conducts a selection TR 12 and a memory cell MOSFET13 of a series circuit 10. On the other hand, a discharge MOSFET14 is nonconductive by signals the inverse of phiP, A1 and no through-current is generated between power supplies VDD, VSS. At the time of precharge is finished, the TR 14 is conductive and if a depletion TR is used for the TR 13, the TR 13 is conductive, the node 11 is discharged, and if an enhancement TR is used for the TR 13, the TR 13 is nonconductive and the node 11 is not discharged. Thus, only when the precharge is finished and the data are read in the node 11, the TR 14 has only to be subjected to conduction control. Thus, the through- current is decreased to reduce the power consumption.</p>
申请公布号 JPS62229596(A) 申请公布日期 1987.10.08
申请号 JP19860071144 申请日期 1986.03.31
申请人 TOSHIBA CORP 发明人 NOTSUYAMA YASUYUKI;USAMI MASAYOSHI;IWAMURA ATSUSHI
分类号 G11C17/12;G11C17/00 主分类号 G11C17/12
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